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cd 4017 running light ic

Posted by ganesh at 6:30 PM

Thursday, February 12, 2009

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uc 3842 ic

Posted by ganesh at 6:21 PM

UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
Current Mode PWM Controller
FEATURES
• Optimized For Off-line And DC
To DC Converters
• Low Start Up Current (<1mA)
• Automatic Feed Forward
Compensation
• Pulse-by-pulse Current Limiting
• Enhanced Load Response
Characteristics
• Under-voltage Lockout With
Hysteresis
• Double Pulse Suppression
• High Current Totem Pole
Output
• Internally Trimmed Bandgap
Reference
• 500khz Operation
• Low RO Error Amp
DESCRIPTION
The UC1842/3/4/5 family of control ICs provides the necessary features to
implement off-line or DC to DC fixed frequency current mode control schemes
with a minimal external parts count. Internally implemented circuits include
under-voltage lockout featuring start up current less than 1mA, a precision
reference trimmed for accuracy at the error amp input, logic to insure latched
operation, a PWM comparator which also provides current limit control, and a
totem pole output stage designed to source or sink high peak current. The
output stage, suitable for driving N Channel MOSFETs, is low in the off state.
Differences between members of this family are the under-voltage lockout
thresholds and maximum duty cycle ranges. The UC1842 and UC1844 have
UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line
applications. The corresponding thresholds for the UC1843 and UC1845 are
8.4V and 7.6V. The UC1842 and UC1843 can operate to duty cycles
approaching 100%. A range of zero to 50% is obtained by the UC1844 and
UC1845 by the addition of an internal toggle flip flop which blanks the output
off every other clock cycle.
BLOCK DIAGRAM
Note 1: A/B A = DIL-8 Pin Number. B = SO-14 and CFP-14 Pin Number.
Note 2: Toggle flip flop used only in 1844 and 1845.
SLUS223A - APRIL 1997 - REVISED MAY 2002
application
INFO
available
2
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . 30V
Supply Voltage (ICC < 30mA) . . . . . . . . . . . . . . . . . Self Limiting
Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A
Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . 5μJ
Analog Inputs (Pins 2, 3). . . . . . . . . . . . . . . . . . . -0.3V to +6.3V
Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . 10mA
Power Dissipation at TA ≤ 25°Χ (DIL−8) . . . . . . . . . . . . . . . . . . 1Ω
Power Dissipation at TA ≤ 25°C (SOIC-14) . . . . . . . . . . 725mW
Storage Temperature Range. . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C
Note 1: All voltages are with respect to Pin 5.
All currents are positive into the specified terminal.
Consult Packaging Section of Databook for thermal
limitations and considerations of packages.
CONNECTION DIAGRAMS
DIL-8, SOIC-8 (TOP VIEW)
N or J Package, D8 Package
PLCC-20 (TOP VIEW)
Q Package
SOIC-14, CFP-14. (TOP VIEW)
D or W Package
PACKAGE PIN FUNCTION
FUNCTION PIN
N/C 1
COMP 2
N/C 3
N/C 4
VFB 5
N/C 6
ISENSE 7
N/C 8
N/C 9
RT/CT 10
N/C 11
PWR GND 12
GROUND 13
N/C 14
OUTPUT 15
N/C 16
VC 17
VCC 18
N/C 19
VREF 20
Package TA ≤ 25°C
Power Rating
Derating Factor
Above TA ≤ 25°C
TA ≤ 70°C
Power Rating
TA ≤ 85°C
Power Rating
TA ≤ 125°C
Power Rating
W 700 mW 5.5 mW/°C 452 mW 370 mW 150 mW
DISSIPATION RATING TABLE
3
PARAMETER TEST CONDITIONS
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5 UNITS
MIN TYP MAX MIN TYP MAX
Reference Section
Output Voltage TJ = 25°C, IO = 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V
Line Regulation 12 ≤ VIN ≤ 25V 6 20 6 20 mV
Load Regulation 1 ≤ I0 ≤ 20mA 6 25 6 25 mV
Temp. Stability (Note 2) (Note 7) 0.2 0.4 0.2 0.4 mV/°C
Total Output Variation Line, Load, Temp. (Note 2) 4.9 5.1 4.82 5.18 V
Output Noise Voltage 10Hz ≤ f ≤ 10kHz, TJ = 25°C (Note2) 50 50 μV
Long Term Stability TA = 125°C, 1000Hrs. (Note 2) 5 25 5 25 mV
Output Short Circuit -30 -100 -180 -30 -100 -180 mA
Oscillator Section
Initial Accuracy TJ = 25°C (Note 6) 47 52 57 47 52 57 kHz
Voltage Stability 12 ≤ VCC ≤ 25V 0.2 1 0.2 1 %
Temp. Stability TMIN ≤ TA ≤ TMAX (Note 2) 5 5 %
Amplitude VPIN 4 peak to peak (Note 2) 1.7 1.7 V
Error Amp Section
Input Voltage VPIN 1 = 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
Input Bias Current -0.3 -1 -0.3 -2 μA
AVOL 2 ≤ VO ≤ 4V 65 90 65 90 dB
Unity Gain Bandwidth (Note 2) TJ = 25°C 0.7 1 0.7 1 MHz
PSRR 12 ≤ VCC ≤ 25V 60 70 60 70 dB
Output Sink Current VPIN 2 = 2.7V, VPIN 1 = 1.1V 2 6 2 6 mA
Output Source Current VPIN 2 = 2.3V, VPIN 1 = 5V -0.5 -0.8 -0.5 -0.8 mA
VOUT High VPIN 2 = 2.3V, RL = 15k to ground 5 6 5 6 V
VOUT Low VPIN 2 = 2.7V, RL = 15k to Pin 8 0.7 1.1 0.7 1.1 V
Current Sense Section
Gain (Notes 3 and 4) 2.85 3 3.15 2.85 3 3.15 V/V
Maximum Input Signal VPIN 1 = 5V (Note 3) 0.9 1 1.1 0.9 1 1.1 V
PSRR 12 ≤ VCC ≤ 25V (Note 3) (Note 2) 70 70 dB
Input Bias Current -2 -10 -2 -10 μA
Delay to Output VPIN 3 = 0 to 2V (Note 2) 150 300 150 300 ns
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for -55°C ≤ TA ≤ 125°C for the
UC184X; -40°C ≤ TA ≤ 85°C for the UC284X; 0°C ≤ TA ≤ 70°C for the 384X; VCC = 15V
(Note 5); RT = 10k; CT = 3.3nF, TA=TJ.
Note 2: These parameters, although guaranteed, are not 100% tested in production.
Note 3: Parameter measured at trip point of latch with VPIN 2 = 0.
Note 4: Gain defined as
A
VPIN
VPIN
= Δ ≤VPIN ≤ V
Δ
1
3
,0 3 0.8
Note 5: Adjust VCC above the start threshold before setting at 15V.
Note 6: Output frequency equals oscillator frequency for the UC1842 and UC1843.
Output frequency is one half oscillator frequency for the UC1844 and UC1845.
Note 7: Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
Temp Stability
V max VREF min
TJ max TJ min
= REF −

( ) ( )
( ) ( )
VREF (max) and VREF (min) are the maximum and minimum reference voltages measured over the appropriate
temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.
4
PARAMETER TEST CONDITION
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5 UNITS
MIN TYP MAX MIN TYP MAX
Output Section
Output Low Level ISINK = 20mA 0.1 0.4 0.1 0.4 V
ISINK = 200mA 1.5 2.2 1.5 2.2 V
Output High Level ISOURCE = 20mA 13 13.5 13 13.5 V
ISOURCE = 200mA 12 13.5 12 13.5 V
Rise Time TJ = 25°C, CL = 1nF (Note 2) 50 150 50 150 ns
Fall Time TJ = 25°C, CL = 1nF (Note 2) 50 150 50 150 ns
Under-voltage Lockout Section
Start Threshold X842/4 15 16 17 14.5 16 17.5 V
X843/5 7.8 8.4 9.0 7.8 8.4 9.0 V
Min. Operating Voltage
After Turn On
X842/4 9 10 11 8.5 10 11.5 V
X843/5 7.0 7.6 8.2 7.0 7.6 8.2 V
PWM Section
Maximum Duty Cycle X842/3 95 97 100 95 97 100 %
X844/5 46 48 50 47 48 50 %
Minimum Duty Cycle 0 0 %
Total Standby Current
Start-Up Current 0.5 1 0.5 1 mA
Operating Supply Current VPIN 2 = VPIN 3 = 0V 11 17 11 17 mA
VCC Zener Voltage ICC = 25mA 30 34 30 34 V
Note 2: These parameters, although guaranteed, are not 100% tested in production.
Note 3: Parameter measured at trip point of latch with VPIN 2 = 0
.
Note 4: Gain defined as: A
VPIN
VPIN
= Δ ≤VPIN ≤ V
Δ
1
3
;0 3 0.8 .
Note 5: Adjust VCC above the start threshold before setting at 15V.
Note 6: Output frequency equals oscillator frequency for the UC1842 and UC1843.
Output frequency is one half oscillator frequency for the UC1844 and UC1845.
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for −55°C ≤ TA ≤ 125°C for the
UC184X; −40°C ≤ TA ≤ 85°C for the UC284X; 0°C ≤ TA ≤ 70°C for the 384X; VCC =
15V (Note 5); RT = 10k; CT = 3.3nF, TA=TJ.
ERROR AMP CONFIGURATION
Error Amp can Source or Sink up to 0.5mA
5
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
UNDER-VOLTAGE LOCKOUT
CURRENT SENSE CIRCUIT
OSCILLATOR SECTION
During under-voltage lock-out, the output driver is
biased to sink minor amounts of current. Pin 6 should be
shunted to ground with a bleeder resistor to prevent
activating the power switch with extraneous leakage
currents.
A small RC filter may be required to suppress switch transients.
Peak Current (IS) is Determined By The Formula
ISMAX ′
RS
6
High peak currents associated with capacitive loads necessitate
careful grounding techniques. Timing and bypass
capacitors should be connected close to pin 5 in a
single point ground. The transistor and 5k potentiometer
are used to sample the oscillator waveform and apply
an adjustable ramp to pin 3.
Shutdown of the UC1842 can be accomplished by two
methods; either raise pin 3 above 1V or pull pin 1 below
a voltage two diode drops above ground. Either method
causes the output of the PWM comparator to be high
(refer to block diagram). The PWM latch is reset dominant
so that the output will remain low until the next
clock cycle after the shutdown condition at pin 1 and/or
3 is removed. In one example, an externally latched
shutdown may be accomplished by adding an SCR
which will be reset by cycling VCC below the lower
UVLO threshold. At this point the reference turns off, allowing
the SCR to reset.
UC1842/3/4/5
UC2842/3/4/5
OUTPUT SATURATION CHARACTERISTICS
ERROR AMPLIFIER OPEN-LOOP
FREQUENCY RESPONSE
OPEN-LOOP LABORATORY FIXTURE
SHUT DOWN TECHNIQUES
7
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
OFFLINE FLYBACK REGULATOR
SLOPE COMPENSATION
A fraction of the oscillator ramp can be resistively
summed with the current sense signal to provide
slope compensation for converters requiring duty
cycles over 50%.
Power Supply Specifications
1. Input Voltages 5VAC to 130VA
(50 Hz/60Hz)
2. Line Isolation 3750V
3. Switching Frequency 40kHz
4. Efficiency at Full Load 70%
5. Output Voltage:
A. +5V, ±5%; 1A to 4A load
Ripple voltage: 50mV P-P Max
B. +12V, ±3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
C. -12V ,±3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third–party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright  2002, Texas Instruments Incorporated
This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.
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la4440 amplifier ic with circuit diagram

Posted by ganesh at 6:17 PM

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lm324

Posted by ganesh at 6:15 PM

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upa1436ah

Posted by ganesh at 6:12 PM

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bu2508af

Posted by ganesh at 11:36 AM

Wednesday, February 11, 2009

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7554 ic data sheet

Posted by ganesh at 5:08 AM

Tuesday, February 3, 2009

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Clap Activated Remote

Posted by ganesh at 3:13 AM

Tuesday, January 20, 2009


An infra-red or wireless remote control has the disadvantage that the small, handy, remote transmitter is often misplaced. The sound operated switch has the advantage that the transmitter is always with you. This project offers a way to control up to four latching switches with two claps of your hand. These switches may be used to control lights or fans – or anything else that does not produce too loud a sound. To prevent an occasional loud sound from causing malfunction, the circuit is normally quiescent. The first clap takes it out of standby state and starts a scan of eight panel-mounted LEDs. Each of the four switches are accompanied with two LEDs – one for indicating the ‘on’ and the other for indicating the ‘off’ state. A second clap, while the appropriate LED is lit, activates that function. For example, if you clap while LED10 used in conjunction with Lamp 1 is lit then the lamp turns on. (If it is already on, nothing happens and it remains on.) A condenser microphone, as used in tape recorders, is used here to pick up the sound of the claps. The signal is then amplified and shaped into a pulse by three inverters (N1 through N3) contained in CMOS hex inverter IC CD4069. A clock generator built from two of the inverter gates (N5 and N6) supplies clock pulses to a decade counter CD4017 (IC2). Eight outputs of this IC drive LEDs (1 through 8). These outputs also go to the J and K inputs of four flip-flops in two type CD4027 ICs (IC3 and IC4). The clock inputs of these flip-flops are connected to the pulse shaped sound signal (available at the output of gate N3). Additional circuitry around the CD4017 counter ensures that it is in the reset state, after reaching count 9, and that the reset is removed when a sound signal is received. Outputs of the four flip-flops are buffered by transistors and fed via LEDs to the gates of four triacs. These triacs switch the mains supply to four loads, usually lamps. If small lamps are to be controlled, these may be directly driven by the transistors. If this circuit is to be active, i.e. scanning all the time, some components around CD4017 IC could be omitted and some connections changed. But then it would no longer be immune to an occasional, spurious loud sound. The condenser microphone usually available in the market has two terminals. It has to be supplied with power for it to function. Any interference on this supply line will be passed on to the output. So the supply for the microphone is smoothed by resistor-capacitor combination of R2, C1 and fed to it via resistor R1. CD4069, a hex unbuffered inverter, contains six similar inverters. When the output and input of such an inverter is bridged by a resistor, it functions as an inverting amplifier. Capacitor C2 couples the signal developed by the microphone to N1 inverter in this IC, which is configured as an amplifier. The output of gate N1 is directly connected to the input of next gate N2. Capacitor C3 couples the output of this inverter to N3 inverter, which is connected as an adjustable level comparator. Inverter N4 is connected as an LED (9) driver to help in setting the sensitivity. Preset VR1 supplies a variable bias to U3. If the wiper of VR1 is set towards the negative supply end, the circuit becomes relatively insensitive (i.e. requires a thunderous clap to operate). As the wiper is turned towards resistor R4, the circuit becomes progressively more sensitive. The sound signal supplied by gate N2 is added to the voltage set by preset VR1 and applied to the input of gate N3. When this voltage crosses half supply voltage, the output of gate N3 goes low. This output is normally high since the input is held low by adjustment of preset VR1. This output is used for two things: First, it releases the reset state of IC2 via diode D1. Second, it feeds the clock inputs to the four flip-flops contained in IC3 and IC4. In the quiescent state, IC2 is reset and its ‘Q0’ output is high. Capacitor C4 is charged positively and it holds this charge due to the connection from R5 to this output (Q0). IC2 is a decade counter with fully decoded outputs. It has ten outputs labelled Q0 to Q9 which go successively high, one at a time, when the clock in put is fed with pulses. IC3 and IC4 are dual JK flip-flops. In this circuit they store (latch) the state of the four switches and control the output through transistors and triacs. At the first clap, the output of gate N3 goes low. Diode D1 is forward biased and it conducts, discharging capacitor C4. The reset input of IC2 goes low, releasing its reset state. All the J and K inputs of the four flip-flops are low and so these do not change state, even though their clock inputs receive pulses. When the reset input of IC2 is low, each clock pulse causes IC2 to advance by one count and its outputs go high successively, lighting up the corresponding LEDs and pulling high the J and K inputs of the four flip-flops, one after the other. Resistor R8 limits the current through LEDs 1 through 8 to about 2 mA. Larger current might cause malfunction due to the outputs of IC2 being pulled down below the logic 1 state input voltage. If a second clap is detected while the J input of a particular flip-flop is high, its Q output will go high, regardless of what state it was in previously. Similarly, if its K input was high, the output will go low. (If both J and K are high, the output will change state at each clock pulse.) Thus although all flip-flops receive the clap signal at their clock inputs, only the one selected by the active output of IC2 will change state. Resistor R9 and capacitor C6 ensure that the flip-flops start in the off state when power to the circuit is switched on, by providing a positive power-on-reset pulse to the reset input pins when power is applied. The preset input pins are not used and are therefore connected directly to ground. When, after eight clock pulses, output Q8 of IC2 becomes high, diode D2 conducts, charging capacitor C4, thereby resetting IC2 and making its Q0 output high. And there it stays, awaiting the next clap. The four Q outputs of IC3 and IC4 are buffered by npn transistors, fed through current limiting resistors and LEDs (to indicate the on/off state of the loads) to the gates of four triacs. Four lamps operating on the mains may thus be controlled. For demonstrations, it might be better to drive small lamps (drawing less than 100 mA at 12V) directly from the emitters of the transistors. In this case the triacs, LEDs and their associated current limiting resistors may be omitted. It has to be noted that one side of the mains has to be connected to the negative supply line of this circuit when mains loads are to be controlled. This necessitates safe construction of the circuit such that no part of it is liable to be touched. The advantage is that it may be mounted out of reach of curious hands since it does not need to be handled during normal operation. It is advisable to start with the low voltage version and then upgrade to mains operation, once you are sure everything else is working satisfactorily. CMOS ICs are used in this circuit for implementing the amplifying and logic functions. Use of a dedicated supply is recommended because the integrated circuits will be damaged if the supply voltage is too high, or is of wrong polarity. An external power supply may get connected up the wrong way around, or be inadvertently set to too high a voltage. Therefore it is a good idea to start by constructing the power supply section and then add the other components of the circuit. If the clock is working, you may turn your attention to the amplifier. LED9 should be off, and should flash when the terminals of capacitor C2 are touched with a wet finger (the classic wet finger test). Preset VR1 may need to be adjusted until LED9 just turns off. The output of gate N2 will be at about half the supply voltage. The output of gate N3 would normally be high. The voltage at the input of gate N3 should vary when preset VR1 is varied. High-efficiency LEDs should preferably be used in this circuit. The microphone has two terminals, one of which is connected to its body. This terminal has to be connected to circuit ground, and the other to the junction of resistor R2 and capacitor C2. These wires are preferably kept short (one or two centimetres) to avoid noise pickup. With the microphone connected, a loud sound (a clap) should result in LED9 blinking. Adjust preset VR1 so that LED9 stays off on the loudest of background noises but starts glowing when you clap. If the clap-to-start feature is not required, it may be disabled by omitting components D1, D2, R5, C4 and connecting a wire link in place of diode D2. Then IC2 will be alive and kicking all the time.

Power supply failure alarm

Posted by ganesh at 11:18 AM

Wednesday, January 7, 2009


Most of the power supply failure indicator circuits need a separate power supply for themselves. But the alarm circuit presented here needs no additional supply source. It employs an electrolytic capacitor to store adequate charge, to feed power to the alarm circuit which sounds an alarm for a reasonable duration when the supply fails.This circuit can be used as an alarm for power supplies in the range of 5V to 15V. To calibrate the circuit, first connect the power supply (5 to 15V) then vary the potentiometer VR1 until the buzzer goes from on to off.Whenever the supply fails, resistor R2 pulls the base of transistor low and saturates it, turning the buzzer ON.

Water Level Indicator with alarm

Posted by ganesh at 11:17 AM


This circuit not only indicates the amount of water present in the overhead tank but also gives an alarm when the tank is full.The circuit uses the widely available CD4066, bilateral switch CMOS IC to indicate the water level through LEDs.When the water is empty the wires in the tank are open circuited and the 180K resistors pulls the switch low hence opening the switch and LEDs are OFF. As the water starts filling up, first the wire in the tank connected to S1 and the + supply are shorted by water. This closes the switch S1 and turns the LED1 ON. As the water continues to fill the tank, the LEDs2 , 3 and 4 light up gradually.The no. of levels of indication can be increased to 8 if 2 CD4066 ICs are used in a similar fashion.
When the water is full, the base of the transistor BC148 is pulled high by the water and this saturates the transistor, turning the buzzer ON. The SPST switch has to be opened to turn the buzzer OFF.Remember to turn the switch ON while pumping water otherwise the buzzer will not sound!

Fire Alarm

Posted by ganesh at 11:16 AM


This circuit warns the user against fire accidents. It relies on the smoke that is produced in the event of a fire. When this smoke passes between a bulb and an LDR, the amount of light falling on the LDR decreases. This causes the resistance of LDR to increase and the voltage at the base of the transistor is pulled high due to which the supply to the COB (chip-on-board) is completed. Different COBs are available in the market to generate different sounds. The choice of the COB depends on the user. The signal generated by COB is amplified by an audio amplifier. In this circuit, the audio power amplifier is wired around IC TDA 2002. The sensitivity of the circuit depends on the distance between bulb and LDR as well as setting of preset VR1. Thus by placing the bulb and the LDR at appropriate distances, one may vary preset VR1 to get optimum sensitivity. An ON/OFF switch is suggested to turn the circuit on and off as desirable.

DayLight Alarm

Posted by ganesh at 11:14 AM


The circuit presented here wakes you up with a loud alarm at the break of the daylight. Once again the 555 timer is used here. It is working as an astable multivibrator at a frequency of about 1kHz.The circuit's operation can be explained as follows:When no light falls on the LDR, the transistor is pulled high by the variable resistor. Hence the transistor is OFF and the reset pin of the 555 is pulled low. Due the this the 555 is reset.When light falls on the LDR, its resistance decreases and pulls the base of the transistor low hence turning it ON. This pulls the reset pin 4 of the 555 high and hence enables the 555 oscillator and a sound is produced by the speaker.The variable 100K resistor has to be adjusted to set the light intensity that triggers the alarm.

4 in 1 Burglar Alarm

Posted by ganesh at 11:12 AM


I n this circuit, the alarm will be switched on under the following four different conditions: 1. When light falls on LDR1 (at the entry to the premises). 2. When light falling on LDR2 is obstructed. 3. When door switches are opened or a wire is broken. 4. When a handle is touched. The light dependent resistor LDR1 should be placed in darkness near the door lock or handle etc. If an intruder flashes his torch, its light will fall on LDR1, reducing the voltage drop across it and so also the voltage applied to trigger 1 (pin 6) of IC1. Thus transistor T2 will get forward biased and relay RL1 energise and operate the alarm. Sensitivity of LDR1 can be adjusted by varying preset VR1. LDR2 may be placed on one side of a corridor such that the beam of light from a light source always falls on it. When an intruder passes through the corridor, his shadow falls on LDR2. As a result voltage drop across LDR2 increases and pin 8 of IC1 goes low while output pin 9 of IC1 goes high. Transistor T2 gets switched on and the relay operates to set the alarm. The sensitivity of LDR2 can be adjusted by varying potentiometer VR2. A long but very thin wire may be connected between the points A and B or C and D across a window or a door. This long wire may even be used to lock or tie something. If anyone cuts or breaks this wire, the alarm will be switched on as pin 8 or 6 will go low. In place of the wire between points A and B or C and D door switches can be connected. These switches should be fixed on the door in such a way that when the door is closed the switch gets closed and when the door is open the switch remains open. If the switches or wire, are not used between these points, the points should be shorted. With the help of a wire, connect the touch point (P) with the handle of a door or some other suitable object made of conducting material. When one touches this handle or the other connected object, pin 6 of IC1 goes ‘low’. So the alarm and the relay gets switched on. Remember that the object connected to this touch point should be well insulated from ground. For good touch action, potentiometer VR3 should be properly adjusted. If potentiometer VR3 tapping is held more towards ground, the alarm will get switched on even without touching. In such a situation, the tapping should be raised. But the tapping point should not be raised too much as the touch action would then vanish. When you vary potentiometer VR1, re-adjust the sensitivity of the touch point with the help of potentiometer VR3 properly. If the alarm has a voltage rating of other than 6V (more than 6V), or if it draws a high current (more than 150 mA), connect it through the relay points as shown by the dotted lines. As a burglar alarm, battery backup is necessary for this circuit. Note: Electric sparking in the vicinity of this circuit may cause false triggering of the circuit. To avoid this adjust potentiometer VR3 properly.

THE 555 IC

Posted by ganesh at 2:58 AM

Tuesday, January 6, 2009


















































CHIP PRICES


The 555 IC is one of the simplest and most rugged IC's on the market. It has been used in thousands of applications and is extremely popular. This discussion will cover its numerous modes of operation and present a number of circuits for these applications. However I must point out one thing. The 555 is not suited for battery applications and it is not really suited for combining with some types of CMOS circuitry. The 555 is a very noisy chip and has a very nasty internal feature called "crow-bar effect" that can put a lot of noise on the power rails of a circuit. Its operation as an oscillator can be done by other chips and we have provided some alternatives in the notes. The 555 has a number of derivatives that offer improvements (such as low-power, low voltage, high speed operation) and these will also be covered. This is the first time a number of comparisons and alternatives have been provided in a discussion and this is needed for you to get a complete picture of its suitability for a particular project. There are cheaper and better chips to carry out identical operations to a 555 and we will leave it to you to decide. THE 555 TIMER IC The 555 is commonly called a TIMER IC. It is an 8-pin chip and has a number of different identifications: LM555CN from National and SE555/NE555 from Signetics are just two manufacturers. These numbers all refer to the most common and cheapest version, we will call the 555. The 555 contains more than 28 transistors and it is basically a chip containing a number of building blocks that end up very similar to an oscillator without the TIMING COMPONENTS. It needs two or three external components to produce an oscillator capable of operating at a frequency from 1Hz to 500kHz. When it oscillates at a frequency less than 1Hz, the circuit is called a Timer or Delay. The chip also has a pin (pin 2) that prevents the chip from starting the Timing cycle until it is taken LOW. Another pin (pin 4) stops the chip from oscillating (or continuing with a delay-time) when it is taken LOW and a pin (pin 5) that can adjust the mark-space ratio of the waveform. The diagrams below show the names of each pin and a simplified block diagram of the internal workings.
The 555






















THE FUNCTION OF EACH PIN Pin 1 Ground The ground (or common) pin is connected to the 0v rail - commonly called the negative rail or EARTH rail. Pin 2 Trigger This pin connects to the lower comparator and is used to set the control flip flop. When it is taken LOW, it causes the output to go HIGH. This is the beginning of the timing sequence for a monostable operation. Triggering is accomplished by taking the pin below 1/3 of rail voltage - in digital terms, this is called a LOW. The action of the trigger input is level-sensitive, allowing slow rate-of-change waveforms, (as well as pulses), to be used as trigger sources. The trigger pulse must be of shorter duration than the time interval determined by external R and C. If this pin is held low for a longer period of time, the output will remain high until the trigger input is high again.If the trigger input remains lower than 1/3 rail voltage for longer than the timing cycle, the timer will re-trigger upon termination of the first output pulse. When the timer is used in monostable mode with trigger pulses longer than the output pulse, the trigger duration must be shortened by external circuitry.The minimum pulse-width for reliable triggering is about 10uS.Pin 3 Output The output of the 555 comes from a high-current totem-pole stage. This provides both sinking and sourcing current. The high-state output voltage is about 1.7 volts less than the supply. At 15 volt supply, the chip can sink 200mA with an output-low voltage level of 2 volts. High-state level is 13.3 volts. Both rise and fall times of the output waveform are quite fast, typical switching being 100nS.To make the output HIGH, the TRIGGER PIN (pin 2) is momentarily taken from a HIGH to a LOW. This causes the output to go HIGH. This is the only way the output can be made to go high. The output can be returned to a LOW by making the THRESHOLD PIN (Pin 6) go from a LOW to a HIGH.The output can also be made to go LOW by taking the RESET PIN to a LOW state.Pin 4 Reset This pin is used to make the OUTPUT PIN (Pin 3) LOW. The reset pin must go below 0.7 volt and it needs 0.1mA to reset the chip. The RESET PIN is an overriding function. It will force the OUTPUT PIN to go LOW regardless of the state of the TRIGGER PIN (Pin 2). It can be used to terminate an output pulse prematurely, to gate oscillations from "on" to "off." The pin is active when a voltage level between 0v and 0.4 volt is applied to it. When not used, it is recommended that the RESET PIN be tied to the positive rail to avoid the possibility of false resetting.Pin 5 Control Voltage This pin allows direct access to the 2/3 voltage-divider point. This is the reference level for the upper comparator. When the 555 timer is used in a voltage-controlled mode, the voltage-controlled operation ranges from about 1 volt below rail-voltage to 2 volts above ground (0v). Voltages can be safely applied outside these limits, but they should be confined to between 0v and rail voltage. By applying a voltage to this pin, it is possible to vary the timing of the chip independently of the RC network. The control voltage may be varied from 45 to 90% of the Vcc in the monostable mode, making it possible to control the width of the output pulse independently of RC. When used in the astable mode, the control voltage can be varied from 1.7v to the full Vcc. Varying the voltage in the astable mode will produce a frequency modulated (FM) output.If the control-voltage pin is not used, it should be bypassed to ground, with a 10n capacitor to prevent noise entering the chip. Pin 6 Threshold Pin 6 is one input to the upper comparator (the other is pin 5). It makes the OUTPUT PIN go LOW. To make the output go LOW, the Threshold pin is taken from a LOW to a level above 2/3 of rail voltage. This pin is level-sensitive, allowing slow rate-of-change waveforms to be detected.A dc current, termed the threshold current, must also flow into this pin from the external circuit. This current is typically 0.1µA, and will determine the upper limit of total resistance allowable from pin 6 to rail. For 5v operation the resistance is 16M. For 15v operation, the maximum resistance is 20M.Pin 7 Discharge This pin is connected to the open collector of an NPN transistor. The emitter goes to ground. When the transistor is turned "on,'" pin 7 is effectively shorted to ground. The timing capacitor is connected between pin 7 and ground and is discharged when the transistor turns "on". The conduction state of this transistor is identical in timing to that of the output stage. It is "on" (low resistance to ground) when the output is LOW and "off" (high resistance to ground) when the output is HIGH.Maximum collector current is internally limited by design, so that any size capacitor can be used without damage to the chip. In certain applications, this open collector output can be used as an auxiliary output terminal, with current-sinking capability similar to the OUTPUT (pin 3).Pin 8 Rail This pin (also referred to as Vcc) is the positive supply voltage pin for the 555. Supply-voltage operating range is +4.5 volts to +16 volts. The chip will operate over this voltage range without change in timing period. The only change is the output drive capability, which increases in current as the supply voltage is increased.
USING THE 555A 555 can be wired:1. As a TIMER (monostable operation - also called a DELAY), 2. As an OSCILLATOR (also called a MULTIVIBRATOR - or astable operation) 3. As a ONE-SHOT (also called monostable operation). The 555 IC is an extremely popular IC. It is simple to use and very rugged. It comes in a single, dual or quad package with part numbers such as LM555, NE555, LM556, NE556. It is ideal for astable (free-running) oscillators as well as the one-shot monostable mode.The 555 can be triggered and reset on falling waveforms and the output can source or sink up to 200mA. The HIGH output is about 1.7v less than supply. The NE555 operates 3v - 16v DC.Maximum operating frequency is 500kHz.
THE 75557555 is a CMOS version of the 555. It is exactly the same as the 555 but consumes less power. The 555 consumes 10mA, while the 7555 consumes 80uA (1/120th). The CMOS version comes with different identifications according to the manufacturer.LMC555 or LM555CN is made by National Semiconductors, TLC555 is made by Texas Instruments, ICM7555 is supplied by Philips, ZSCT1555 comes from Zetex and ICM7555 is made by Maxim. The main feature to note is the inclusion of the number "7" or the letter "C" to identify the CMOS version. They use less power than the older (555, NE555, LM555) versions and don't require a capacitor on the control pin. Although pin and functionally compatible, the component values differ between the low-power CMOS and older versions.The Exar XR-L555 timer is a micro-power version of the standard 555 offering a direct, pin-for-pin substitute with the advantage of lower power operation. It is capable of operation from 2.7v to 18v. At 5v, the L555 will consume about 900 microwatts, making it ideally suitable for battery operated circuits. The internal schematic of the L555 is similar to the standard 555 but with current-spiking filtering, lower output drive capability, higher nodal impedances, and better noise reduction system.USING THE 7555 The ICM7555 is a CMOS timer providing significantly improved performance over the standard NE/SE555 timer, while at the same time being a direct replacement in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, TRIGGER, and RESET currents, no crow-barring of the supply current during output transitions, higher frequency performance and no requirement to decouple CONTROL VOLTAGE for stable operation.The ICM7555 is a stable controller capable of producing accurate time delays or frequencies.In the one-shot mode, the pulse width of each duration is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free-running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the bipolar 555 device, the CONTROL VOLTAGE pin does not have to be decoupled with a capacitor. The output can source or sink currents large enough to drive TTL loads or provide minimal offsets to drive CMOS loads. Maximum output current 50 - 80mA.
Exact equivalent in most applications for NE/SE555
Low supply current: 80µA (typical)
Extremely low trigger, threshold, and reset currents: 20pA (typical)
High-speed operation: 500kHz guaranteed
Wide operating supply voltage: 3v to 16v
Normal reset function. No crow-barring of supply during output transition
Can be used with higher-impedance timing elements than the bipolar 555 for longer time constants
Timing from microseconds to hours
Operates in both astable and monostable modes
Adjustable duty cycle
Output source/sink driver can drive TTL/CMOS. Maximum output current 50 - 80mA.
Typical temperature stability of 0.005%/°C at 25°C
Rail-to-rail outputs
An improvement on the CMOS 7555 is the ZSCT1555 from Zetex. It is guaranteed to work down to to 0.9 volts with bipolar technology. It has been designed for portable applications, by offering single battery cell operation. (See end of P3 for a technician's difficulty with getting this chip to oscillate.)It provides the same precision timing capabilities as its predecessors, (the 555 and 7555) it has the same 8 legged pin-out. With the simple adjustment of external passive components to set the frequency, the device's function is just the same, whether it be generating accurate time delays or oscillations.Assuming a 5v supply, a typical CMOS part draws 170uA while the new timer pulls 140uA, and at 1.5v just 75uA.
555 Vs 7555The choice between the standard 555 and CMOS version (7555) or ZSCT1555 will depend on cost, availability, load current required and frequency of operation. It will mainly come down to battery or mains operation for the project. Normally, when we change from a TTL chip to a CMOS chip, the component values change by a factor of 10x or 100x. This is because the TTL chips are very low impedance and CMOS is very high impedance. But if a 555 is substituted for a CMOS version, the timing components remain the SAME! This is very convenient. Chips can be substituted without having to alter the surrounding circuitry. The only change will be the current consumption of the chip. In general, the consumption will reduce from about 10mA to approx 0.5mA. (A LED Voltmeter circuit made the following circuit-current comparison: using 555 = 7mA, using 7555 = 0.35mA). This is typical of the current-saving of a CMOS version. This article covers most types and provides a number of comparisons and substitutions. A typical 7555 circuit is shown below:

Note the need for the driver transistor in the circuit above, as the 7555 has an output capability of about 50mA. DRAWING 555 "BLOCKS"One of the most important points when drawing a 555 "block" is maintaining a standard layout. Diagrammatic blocks on a circuit diagram are not supposed to show the pins in the same order as the legs on a chip. The wiring to the chip should be placed in positions to represent their function. The power is placed at the top, ground at he bottom, input at the left and output at the right. The other lines are also placed in appropriate positions.The layout should be positioned to aid in the interpretation of a diagram. The end result should be to provide the maximum information and make it easy to interpret the symbol.Many of the 555 circuit diagrams place the lines to the 555 block so you have to interpret every diagram individually. This makes reading a circuit diagram very slow. The first thing you need to know is the function of each pin. See the animation below:

The 555 can be used for a number of applications.It can be wired as an OSCILLATOR or a MONOSTABLE or DELAY and many different circuits can be produced with these modes of operation.
THE 555 AS AN OSCILLATOR The 555 can be wired as an OSCILLATOR. It needs 2 external components - a resistor R and a capacitor C. These are called TIMING COMPONENTS. The diagram below shows these two components:

The capacitor charges via R and when it reaches 2/3 of rail voltage, pin 7 shorts the capacitor to ground. This means the capacitor charges slowly but discharges very quickly. An improved layout is shown below:

The capacitor charges via R (plus the top resistor) and discharges via R (only). If the top resistor is small compared with R, we can neglect it, so that C charges via R and discharges via R at about the same rate. The top resistor simply separates pin 7 from the positive rail as pin 7 shorts to ground to discharge the capacitor during part of the cycle.
HOW THE 555 OSCILLATES The capacitor charges via the timing resistor R and when the voltage across it reaches 2/3 of the supply voltage, the output of the 555 goes LOW. The timing resistor is taken to the 0v rail via pin 7 and the capacitor discharges. When the voltage across the capacitor reaches 1/3 of rail voltage the output of the 555 goes HIGH. The timing resistor is taken to the positive rail via the top resistor (pin7 effectively comes out of circuit) and the cycle repeats. Don't worry about pins 4 or 5 at the moment.The animation below shows how the 555 oscillates:

These are the three points to note:1. Pin 2 detect the low voltage on the capacitor, and makes pin 7 and the output go HIGH2. Pin 6 detects the high voltage on the capacitor and makes pin 7 and the output go LOW3. Pin 7 is "in-phase" with the output. (both are low at the same time)An improved oscillator is shown in the diagram below. It uses only one resistor to charge and discharge the capacitor and the circuit does not have the wasteful top resistor. The circuit draws less current than the circuit above but the only difference is the frequency of operation will be lower for the same value of components because the voltage delivered by the output line is 1.7v less than the supply rail. The output can deliver up to 200mA but if it is delivering a high current, the output voltage may be reduced and this will affect the frequency of operation. If a reliable frequency is needed, this is not the circuit to choose.

THE ACTION OF PIN 4 Pin 4 is called the RESET PIN. It is called an ACTIVE LOW pin. When pin 4 is HIGH, the chip operates normally. When pin 4 is taken LOW, the output of the chip is INHIBITED - it remains LOW. Pin 7 is also taken low and the chip is prevented from oscillating. Mouseover the following animation to see the action of pin 4:
Mouse-over to INHIBIT the 555
THE 555 AS A MONOSTABLE The 555 can be wired as a monostable. A monostable has one stable state and that is the OFF state. The unstable state is called the ON or HIGH state. When it is triggered by an input pulse, the monostable switches to its temporary or ON state. It remains in that state for a period of time determined by an RC network and returns to its stable state. In other words, the monostable circuit generates a single pulse of a fixed time duration each time it receives and input trigger pulse. The monostable circuit can also be called a ONE-SHOT due to the single-pulse it creates. This type of circuit can be used for activating an external device for a specific length of time. They can also be used to generate delays. Another use for this type of circuit is to take the brief pulse of a push-button and activate a device. This is called a PULSE-EXTENDER. It can also be used to clean-up the noisy output of a push-button and this is called SWITCH DEBOUNCING. The diagram below shows a push-button connected to a 555. When the button is pressed, the relay operates for 5 seconds. The button must be released before the time-interval has expired otherwise the time is extended. This is the only limitation of this circuit.

In the next circuit, the "button-press" is detected via "AC-means." In other words, the button is "AC-coupled." This allows the button to be pressed for any length of time and the output pulse will be determined by the value of the 47k resistor and 1u electrolytic. The "trigger pulse" from the switch involves a capacitor (10n) to detect the low. The second 100k and 10n capacitor have a "charge-rate" of about about 1/100th second and this means the circuit will not detect a "single-shot" above 100 pulses per second. (The first 100k is used to discharge the capacitor, in conjunction with the second 100k resistor). This means you can make the output pulse as short as 1mS but you will not be able to get a "pulse-rate" above 100 pulses per second, as the capacitor has to discharge through both 100k's (equal to 200k).

In the next circuit, the switch can be pressed for any length of time and the circuit will only produce a 5 second output. The circuit is prevented from re-triggering by the addition of a 470k and 100n capacitor. When the switch is pressed, the uncharged capacitor takes pin 2 low and triggers the circuit. If the button is kept pressed the 100n charges and takes pin 2 high. The potential across the voltage divider formed by the 47k and 470k resistors is insufficient to re-trigger the monostable. The circuit "times-out" and the output goes low. When the button is released, the 100n discharges through the 470k and is ready for the next press. Alternatively, you can use the "front-end" of the pervious circuit (two 100k's and 10n) for detecting the press of the button.
A monostable (one-shot) can be connected to an astable (free-running oscillator) so that it gates (or inhibits) the oscillator to produce an output tone for a short duration. The circuit below can be used for an application such as doorbell. It is not suitable for battery operation as the 555 IC's are connected to the supply and draw current at all times.
This circuit can be used for a doorbell..
Pin 2 of the first 555 is HIGH and thus it is "non-operational" as it detects a LOW. Pin 6 is detecting a HIGH and thus the output of the IC is LOW. The output of the first 555 goes to the INHIBIT pin of the second 555. When pin 4 is LOW, the output of the chip is kept LOW.